UVD_CTX_DATA__DATA__SHIFT  241 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT 0x00000000
UVD_CTX_DATA__DATA__SHIFT  122 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT 0x0
UVD_CTX_DATA__DATA__SHIFT  134 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT 0x0
UVD_CTX_DATA__DATA__SHIFT  136 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT 0x0
UVD_CTX_DATA__DATA__SHIFT  374 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT                                                                             0x0
UVD_CTX_DATA__DATA__SHIFT  802 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT                                                                             0x0
UVD_CTX_DATA__DATA__SHIFT 1820 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT                                                                             0x0
UVD_CTX_DATA__DATA__SHIFT 2553 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CTX_DATA__DATA__SHIFT                                                                             0x0