UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT  223 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x00000006
UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT  280 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6
UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT  304 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6
UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT  306 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 0x6
UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 1984 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT                                                                   0x6
UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT 2032 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_UDEC_STATUS__IT_SCLK__SHIFT                                                                   0x6