UVD_CGC_STATUS__VCPU_VCLK_MASK 204 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x04000000L UVD_CGC_STATUS__VCPU_VCLK_MASK 215 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x4000000 UVD_CGC_STATUS__VCPU_VCLK_MASK 231 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x4000000 UVD_CGC_STATUS__VCPU_VCLK_MASK 233 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x4000000 UVD_CGC_STATUS__VCPU_VCLK_MASK 904 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x04000000L UVD_CGC_STATUS__VCPU_VCLK_MASK 1923 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x04000000L UVD_CGC_STATUS__VCPU_VCLK_MASK 1973 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__VCPU_VCLK_MASK 0x04000000L