UVD_CGC_STATUS__VCPU_SCLK__SHIFT  203 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT 0x00000019
UVD_CGC_STATUS__VCPU_SCLK__SHIFT  214 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT 0x19
UVD_CGC_STATUS__VCPU_SCLK__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT 0x19
UVD_CGC_STATUS__VCPU_SCLK__SHIFT  232 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT 0x19
UVD_CGC_STATUS__VCPU_SCLK__SHIFT  871 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT                                                                      0x19
UVD_CGC_STATUS__VCPU_SCLK__SHIFT 1891 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT                                                                      0x19
UVD_CGC_STATUS__VCPU_SCLK__SHIFT 1941 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK__SHIFT                                                                      0x19