UVD_CGC_STATUS__VCPU_SCLK_MASK  202 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK 0x02000000L
UVD_CGC_STATUS__VCPU_SCLK_MASK  213 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK 0x2000000
UVD_CGC_STATUS__VCPU_SCLK_MASK  229 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK 0x2000000
UVD_CGC_STATUS__VCPU_SCLK_MASK  231 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK 0x2000000
UVD_CGC_STATUS__VCPU_SCLK_MASK  903 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK                                                                        0x02000000L
UVD_CGC_STATUS__VCPU_SCLK_MASK 1922 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK                                                                        0x02000000L
UVD_CGC_STATUS__VCPU_SCLK_MASK 1972 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__VCPU_SCLK_MASK                                                                        0x02000000L