UVD_CGC_STATUS__UDEC_VCLK_MASK  200 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK 0x00000020L
UVD_CGC_STATUS__UDEC_VCLK_MASK  173 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK 0x20
UVD_CGC_STATUS__UDEC_VCLK_MASK  189 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK 0x20
UVD_CGC_STATUS__UDEC_VCLK_MASK  191 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK 0x20
UVD_CGC_STATUS__UDEC_VCLK_MASK  883 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK                                                                        0x00000020L
UVD_CGC_STATUS__UDEC_VCLK_MASK 1902 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK                                                                        0x00000020L
UVD_CGC_STATUS__UDEC_VCLK_MASK 1952 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__UDEC_VCLK_MASK                                                                        0x00000020L