UVD_CGC_STATUS__UDEC_SCLK_MASK  198 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK 0x00000008L
UVD_CGC_STATUS__UDEC_SCLK_MASK  169 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK 0x8
UVD_CGC_STATUS__UDEC_SCLK_MASK  185 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK 0x8
UVD_CGC_STATUS__UDEC_SCLK_MASK  187 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK 0x8
UVD_CGC_STATUS__UDEC_SCLK_MASK  881 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK                                                                        0x00000008L
UVD_CGC_STATUS__UDEC_SCLK_MASK 1900 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK                                                                        0x00000008L
UVD_CGC_STATUS__UDEC_SCLK_MASK 1950 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__UDEC_SCLK_MASK                                                                        0x00000008L