UVD_CGC_STATUS__SYS_VCLK_MASK  194 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK 0x00000004L
UVD_CGC_STATUS__SYS_VCLK_MASK  167 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK 0x4
UVD_CGC_STATUS__SYS_VCLK_MASK  183 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK 0x4
UVD_CGC_STATUS__SYS_VCLK_MASK  185 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK 0x4
UVD_CGC_STATUS__SYS_VCLK_MASK  880 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK                                                                         0x00000004L
UVD_CGC_STATUS__SYS_VCLK_MASK 1899 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK                                                                         0x00000004L
UVD_CGC_STATUS__SYS_VCLK_MASK 1949 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__SYS_VCLK_MASK                                                                         0x00000004L