UVD_CGC_STATUS__SCPU_VCLK_MASK 188 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__SCPU_VCLK_MASK 0x10000000L UVD_CGC_STATUS__SCPU_VCLK_MASK 219 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__SCPU_VCLK_MASK 0x10000000 UVD_CGC_STATUS__SCPU_VCLK_MASK 235 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__SCPU_VCLK_MASK 0x10000000 UVD_CGC_STATUS__SCPU_VCLK_MASK 237 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__SCPU_VCLK_MASK 0x10000000 UVD_CGC_STATUS__SCPU_VCLK_MASK 906 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__SCPU_VCLK_MASK 0x10000000L