UVD_CGC_STATUS__MPRD_SCLK_MASK 176 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x00010000L UVD_CGC_STATUS__MPRD_SCLK_MASK 195 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x10000 UVD_CGC_STATUS__MPRD_SCLK_MASK 211 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x10000 UVD_CGC_STATUS__MPRD_SCLK_MASK 213 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x10000 UVD_CGC_STATUS__MPRD_SCLK_MASK 894 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x00010000L UVD_CGC_STATUS__MPRD_SCLK_MASK 1913 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x00010000L UVD_CGC_STATUS__MPRD_SCLK_MASK 1963 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__MPRD_SCLK_MASK 0x00010000L