UVD_CGC_STATUS__MPEG2_DCLK_MASK  168 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK 0x00000080L
UVD_CGC_STATUS__MPEG2_DCLK_MASK  177 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK 0x80
UVD_CGC_STATUS__MPEG2_DCLK_MASK  193 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK 0x80
UVD_CGC_STATUS__MPEG2_DCLK_MASK  195 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK 0x80
UVD_CGC_STATUS__MPEG2_DCLK_MASK  885 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK                                                                       0x00000080L
UVD_CGC_STATUS__MPEG2_DCLK_MASK 1904 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK                                                                       0x00000080L
UVD_CGC_STATUS__MPEG2_DCLK_MASK 1954 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__MPEG2_DCLK_MASK                                                                       0x00000080L