UVD_CGC_STATUS__IDCT_VCLK_MASK  152 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK 0x00008000L
UVD_CGC_STATUS__IDCT_VCLK_MASK  193 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK 0x8000
UVD_CGC_STATUS__IDCT_VCLK_MASK  209 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK 0x8000
UVD_CGC_STATUS__IDCT_VCLK_MASK  211 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK 0x8000
UVD_CGC_STATUS__IDCT_VCLK_MASK  893 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK                                                                        0x00008000L
UVD_CGC_STATUS__IDCT_VCLK_MASK 1912 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK                                                                        0x00008000L
UVD_CGC_STATUS__IDCT_VCLK_MASK 1962 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__IDCT_VCLK_MASK                                                                        0x00008000L