UVD_CGC_STATUS__IDCT_SCLK_MASK  150 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK 0x00004000L
UVD_CGC_STATUS__IDCT_SCLK_MASK  191 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK 0x4000
UVD_CGC_STATUS__IDCT_SCLK_MASK  207 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK 0x4000
UVD_CGC_STATUS__IDCT_SCLK_MASK  209 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK 0x4000
UVD_CGC_STATUS__IDCT_SCLK_MASK  892 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK                                                                        0x00004000L
UVD_CGC_STATUS__IDCT_SCLK_MASK 1911 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK                                                                        0x00004000L
UVD_CGC_STATUS__IDCT_SCLK_MASK 1961 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_STATUS__IDCT_SCLK_MASK                                                                        0x00004000L