UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK  148 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK 0x00000008L
UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK  691 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK 0x8
UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK  861 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK 0x8
UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK  851 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__WCB_LS_EN_MASK 0x8