UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT  145 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT 0x00000004
UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT  694 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT 0x4
UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT  864 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT 0x4
UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT  854 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_RE_LS_EN__SHIFT 0x4