UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT  143 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT 0x00000008
UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT  702 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT 0x8
UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT  872 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT 0x8
UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT  862 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_MP_LS_EN__SHIFT 0x8