UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT  141 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT 0x00000006
UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT  698 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT 0x6
UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT  868 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT 0x6
UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT  858 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__UDEC_IT_LS_EN__SHIFT 0x6