UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT  129 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT 0x00000001
UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT  688 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT 0x1
UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT  858 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT 0x1
UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT  848 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MPC_LS_EN__SHIFT 0x1