UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT  127 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT 0x0000000c
UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT  710 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT 0xc
UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT  880 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT 0xc
UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT  870 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_MEM_CTRL__MIF_LS_EN__SHIFT 0xc