UVD_CGC_GATE__VCPU__SHIFT  115 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT 0x00000012
UVD_CGC_GATE__VCPU__SHIFT  160 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT 0x12
UVD_CGC_GATE__VCPU__SHIFT  172 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT 0x12
UVD_CGC_GATE__VCPU__SHIFT  174 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT 0x12
UVD_CGC_GATE__VCPU__SHIFT  395 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT                                                                             0x12
UVD_CGC_GATE__VCPU__SHIFT  823 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT                                                                             0x12
UVD_CGC_GATE__VCPU__SHIFT 1841 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT                                                                             0x12
UVD_CGC_GATE__VCPU__SHIFT 1893 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__VCPU__SHIFT                                                                             0x12