UVD_CGC_GATE__UDEC_RE_MASK  111 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK 0x00001000L
UVD_CGC_GATE__UDEC_RE_MASK  147 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK 0x1000
UVD_CGC_GATE__UDEC_RE_MASK  159 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK 0x1000
UVD_CGC_GATE__UDEC_RE_MASK  161 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK 0x1000
UVD_CGC_GATE__UDEC_RE_MASK  409 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK                                                                            0x00001000L
UVD_CGC_GATE__UDEC_RE_MASK  837 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK                                                                            0x00001000L
UVD_CGC_GATE__UDEC_RE_MASK 1856 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK                                                                            0x00001000L
UVD_CGC_GATE__UDEC_RE_MASK 1907 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__UDEC_RE_MASK                                                                            0x00001000L