UVD_CGC_GATE__UDEC_MP_MASK  109 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK 0x00010000L
UVD_CGC_GATE__UDEC_MP_MASK  155 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK 0x10000
UVD_CGC_GATE__UDEC_MP_MASK  167 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK 0x10000
UVD_CGC_GATE__UDEC_MP_MASK  169 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK 0x10000
UVD_CGC_GATE__UDEC_MP_MASK  413 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK                                                                            0x00010000L
UVD_CGC_GATE__UDEC_MP_MASK  841 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK                                                                            0x00010000L
UVD_CGC_GATE__UDEC_MP_MASK 1860 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK                                                                            0x00010000L
UVD_CGC_GATE__UDEC_MP_MASK 1911 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__UDEC_MP_MASK                                                                            0x00010000L