UVD_CGC_GATE__UDEC_IT_MASK 106 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x00004000L UVD_CGC_GATE__UDEC_IT_MASK 151 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x4000 UVD_CGC_GATE__UDEC_IT_MASK 163 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x4000 UVD_CGC_GATE__UDEC_IT_MASK 165 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x4000 UVD_CGC_GATE__UDEC_IT_MASK 411 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x00004000L UVD_CGC_GATE__UDEC_IT_MASK 839 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x00004000L UVD_CGC_GATE__UDEC_IT_MASK 1858 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x00004000L UVD_CGC_GATE__UDEC_IT_MASK 1909 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__UDEC_IT_MASK 0x00004000L