UVD_CGC_GATE__UDEC_CM_MASK  102 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK 0x00002000L
UVD_CGC_GATE__UDEC_CM_MASK  149 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK 0x2000
UVD_CGC_GATE__UDEC_CM_MASK  161 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK 0x2000
UVD_CGC_GATE__UDEC_CM_MASK  163 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK 0x2000
UVD_CGC_GATE__UDEC_CM_MASK  410 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK                                                                            0x00002000L
UVD_CGC_GATE__UDEC_CM_MASK  838 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK                                                                            0x00002000L
UVD_CGC_GATE__UDEC_CM_MASK 1857 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK                                                                            0x00002000L
UVD_CGC_GATE__UDEC_CM_MASK 1908 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__UDEC_CM_MASK                                                                            0x00002000L