UVD_CGC_GATE__MPRD__SHIFT 93 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x00000008 UVD_CGC_GATE__MPRD__SHIFT 140 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 152 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 154 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 385 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 813 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 1831 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8 UVD_CGC_GATE__MPRD__SHIFT 1883 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__MPRD__SHIFT 0x8