UVD_CGC_GATE__MPC__SHIFT 89 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x00000009 UVD_CGC_GATE__MPC__SHIFT 142 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 154 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 156 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 386 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 814 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 1832 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9 UVD_CGC_GATE__MPC__SHIFT 1884 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__MPC__SHIFT 0x9