UVD_CGC_GATE__MPC_MASK   88 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK 0x00000200L
UVD_CGC_GATE__MPC_MASK  141 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_GATE__MPC_MASK 0x200
UVD_CGC_GATE__MPC_MASK  153 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK 0x200
UVD_CGC_GATE__MPC_MASK  155 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK 0x200
UVD_CGC_GATE__MPC_MASK  406 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK                                                                                0x00000200L
UVD_CGC_GATE__MPC_MASK  834 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK                                                                                0x00000200L
UVD_CGC_GATE__MPC_MASK 1853 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_GATE__MPC_MASK                                                                                0x00000200L
UVD_CGC_GATE__MPC_MASK 1904 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_GATE__MPC_MASK                                                                                0x00000200L