UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT   73 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 0x0000000b
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT  228 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT  250 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT  252 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT  421 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT                                                                     0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT  914 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT                                                                     0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 1932 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT                                                                     0xb
UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT 1982 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__UDEC_RE_MODE__SHIFT                                                                     0xb