UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT   71 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0x0000000f
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT  236 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT  258 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT  260 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT  425 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT                                                                     0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT  918 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT                                                                     0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 1936 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT                                                                     0xf
UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT 1986 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__UDEC_MP_MODE__SHIFT                                                                     0xf