UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT   63 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0x0000000c
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT  230 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT  252 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT  254 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT  422 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT                                                                     0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT  915 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT                                                                     0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 1933 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT                                                                     0xc
UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT 1983 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__UDEC_CM_MODE__SHIFT                                                                     0xc