UVD_CGC_CTRL__SCPU_MODE__SHIFT   59 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT 0x0000001e
UVD_CGC_CTRL__SCPU_MODE__SHIFT  266 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT 0x1e
UVD_CGC_CTRL__SCPU_MODE__SHIFT  288 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT 0x1e
UVD_CGC_CTRL__SCPU_MODE__SHIFT  290 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT 0x1e
UVD_CGC_CTRL__SCPU_MODE__SHIFT  440 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT                                                                        0x1e
UVD_CGC_CTRL__SCPU_MODE__SHIFT  933 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT                                                                        0x1e
UVD_CGC_CTRL__SCPU_MODE__SHIFT 1951 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE__SHIFT                                                                        0x1e