UVD_CGC_CTRL__SCPU_MODE_MASK   58 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000L
UVD_CGC_CTRL__SCPU_MODE_MASK  265 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
UVD_CGC_CTRL__SCPU_MODE_MASK  287 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
UVD_CGC_CTRL__SCPU_MODE_MASK  289 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK 0x40000000
UVD_CGC_CTRL__SCPU_MODE_MASK  463 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK                                                                          0x40000000L
UVD_CGC_CTRL__SCPU_MODE_MASK  956 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK                                                                          0x40000000L
UVD_CGC_CTRL__SCPU_MODE_MASK 1975 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__SCPU_MODE_MASK                                                                          0x40000000L