UVD_CGC_CTRL__MPRD_MODE_MASK 52 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L UVD_CGC_CTRL__MPRD_MODE_MASK 253 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 UVD_CGC_CTRL__MPRD_MODE_MASK 275 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 UVD_CGC_CTRL__MPRD_MODE_MASK 277 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x1000000 UVD_CGC_CTRL__MPRD_MODE_MASK 457 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L UVD_CGC_CTRL__MPRD_MODE_MASK 950 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L UVD_CGC_CTRL__MPRD_MODE_MASK 1969 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L UVD_CGC_CTRL__MPRD_MODE_MASK 2018 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__MPRD_MODE_MASK 0x01000000L