UVD_CGC_CTRL__MPC_MODE__SHIFT   49 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT 0x00000019
UVD_CGC_CTRL__MPC_MODE__SHIFT  256 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT 0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT  278 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT 0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT  280 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT 0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT  435 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT                                                                         0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT  928 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT                                                                         0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT 1946 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT                                                                         0x19
UVD_CGC_CTRL__MPC_MODE__SHIFT 1996 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__MPC_MODE__SHIFT                                                                         0x19