UVD_CGC_CTRL__LRBBM_MODE__SHIFT   47 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT 0x0000001b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT  260 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT 0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT  282 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT 0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT  284 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT 0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT  437 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT                                                                       0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT  930 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT                                                                       0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT 1948 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT                                                                       0x1b
UVD_CGC_CTRL__LRBBM_MODE__SHIFT 1998 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE__SHIFT                                                                       0x1b