UVD_CGC_CTRL__LRBBM_MODE_MASK   46 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK 0x08000000L
UVD_CGC_CTRL__LRBBM_MODE_MASK  259 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK 0x8000000
UVD_CGC_CTRL__LRBBM_MODE_MASK  281 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK 0x8000000
UVD_CGC_CTRL__LRBBM_MODE_MASK  283 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK 0x8000000
UVD_CGC_CTRL__LRBBM_MODE_MASK  460 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK                                                                         0x08000000L
UVD_CGC_CTRL__LRBBM_MODE_MASK  953 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK                                                                         0x08000000L
UVD_CGC_CTRL__LRBBM_MODE_MASK 1972 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK                                                                         0x08000000L
UVD_CGC_CTRL__LRBBM_MODE_MASK 2021 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__LRBBM_MODE_MASK                                                                         0x08000000L