UVD_CGC_CTRL__IDCT_MODE_MASK 38 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x00800000L UVD_CGC_CTRL__IDCT_MODE_MASK 251 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x800000 UVD_CGC_CTRL__IDCT_MODE_MASK 273 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x800000 UVD_CGC_CTRL__IDCT_MODE_MASK 275 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x800000 UVD_CGC_CTRL__IDCT_MODE_MASK 456 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x00800000L UVD_CGC_CTRL__IDCT_MODE_MASK 949 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x00800000L UVD_CGC_CTRL__IDCT_MODE_MASK 1968 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x00800000L UVD_CGC_CTRL__IDCT_MODE_MASK 2017 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__IDCT_MODE_MASK 0x00800000L