UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT   33 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x00000002
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT  224 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_4_2_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT  246 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_5_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT  248 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_6_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT  419 drivers/gpu/drm/amd/include/asic_reg/uvd/uvd_7_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT                                                               0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT  912 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_1_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT                                                               0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 1930 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_0_0_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT                                                               0x2
UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT 1980 drivers/gpu/drm/amd/include/asic_reg/vcn/vcn_2_5_sh_mask.h #define UVD_CGC_CTRL__CLK_GATE_DLY_TIMER__SHIFT                                                               0x2