UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE  210 drivers/clk/tegra/clk-pll.c #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE BIT(5)
UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE  201 drivers/clk/tegra/clk-tegra210.c #define UTMIPLL_HW_PWRDN_CFG0_SEQ_RESET_INPUT_VALUE	BIT(5)