UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE  212 drivers/clk/tegra/clk-pll.c #define UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE BIT(24)
UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE  198 drivers/clk/tegra/clk-tegra210.c #define UTMIPLL_HW_PWRDN_CFG0_SEQ_ENABLE	BIT(24)