BIF_BX_PF1_BUS_CNTL__SET_MC_TC_MASK 20686 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define BIF_BX_PF1_BUS_CNTL__SET_MC_TC_MASK                                                                   0x0000E000L
BIF_BX_PF1_BUS_CNTL__SET_MC_TC_MASK 116312 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define BIF_BX_PF1_BUS_CNTL__SET_MC_TC_MASK                                                                   0x0000E000L