UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 11906 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 0x17
UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 11718 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 0x17
UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 9328 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 0x00000017
UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 4350 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT1_CPSEL__SHIFT 0x17