UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 11904 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 0x15
UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 11716 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 0x15
UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 9326 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 0x00000015
UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 4348 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_TX_CONTROL2__UNIPHY_RT0_CPSEL__SHIFT 0x15