UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 12035 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 0x1e0
UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 11847 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 0x1e0
UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 4481 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_REG_TEST_OUTPUT__UNIPHY_PLL_TEST_VCTL_MASK 0x1e0