UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 11991 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 0x10
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 11803 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 0x10
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 9219 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 0x00000010L
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 4435 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_SEL_MASK 0x10