UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 12002 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 0xc
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 11814 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 0xc
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 9218 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 0x0000000c
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 4446 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN__SHIFT 0xc