UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 12001 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 0x1000
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 11813 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 0x1000
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 9217 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 0x00001000L
UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 4445 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL2__UNIPHY_IDCLK_EN_MASK 0x1000