UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 11976 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 11788 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 9202 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x00000008
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 4420 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_LF_CNTL__SHIFT 0x8