UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 11965 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 0x1 UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 11777 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 0x1 UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 9197 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 0x00000001L UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 4409 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_ENABLE_MASK 0x1