UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 11978 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 11790 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 9192 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x00000010
UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 4422 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define UNIPHY_PLL_CONTROL1__UNIPHY_PLL_BW_CNTL__SHIFT 0x10